The invention relates to p-channel metal oxide semiconductor (PMOS) devices and is specifically directed to output circuits that are designed to interface directly with, or drive, other devices such as the families known as N-channel metal oxide semiconductor (NMOS) devices, transistor-transistor logic (TTL) devices, and complementary metal oxide semiconductor (CMOS) devices.
The NMOS, TTL, and CMOS device families have developed a circuitry tradition wherein a single positive power supply, referenced to ground potential is used to operate the devices. Typically a 5-volt supply is used and an input near +5 volts constitutes a logic "1", while an input near zero or ground potential constitutes a logic "0". Furthermore input voltages of less than approximately 0.6 volt negative with respect to ground may damage the devices or may cause malfunction due to parasitic active elements.
PMOS circuitry has proven to be very useful particularly in large scale integration (LSI) where large numbers of devices and circuit functions can be incorporated into a single chip. However, in PMOS circuits it has been found desirable to operate with voltages in excess of 5 volts. The chip substrate is connected to the positive supply terminal as the most positive circuit element designated V.sub.SS. All devices are operated at a relatively negative potential designated -V.sub.GG. Extending the positive logic convention to these devices as it is used in the above-mentioned other families, in PMOS a logic "0" is a negative potential with respect to V.sub.SS and a logic "1" is a potential near V.sub.SS.
Clearly there will be difficulties associated when PMOS devices are coupled to the other device families. In the prior art such coupling is often done using so called interface circuitry which provides the desired signal conversion. In some cases the PMOS output circuitry is operated with respect to a "ground" terminal or reference. This latter approach is undesirable because it adds an extra pin to the IC package and imposes design restraints on the output devices that are difficult to meet in practice.